Add dcache_writeback_region() call after copying library data to IMR
(Isolated Memory Region) to ensure cache coherency in multicore
scenarios.

Without this cache operation, when Core 0 loads a library into IMR via
memcpy_s(), the data remains in Core 0's data cache and is not written
back to main memory. When Core 1 later tries to create a module from
this library, it reads uninitialized or stale data from IMR, causing
either:
- "Unsupported module API version" errors (reading garbage build info)
- Fatal PIF data errors and crashes (accessing corrupted module data)

The fix adds a single cache writeback operation after all library data
(manifest + module code/data) has been copied to IMR. This ensures
library data written by Core 0 is flushed from cache to IMR memory
before Core 1 attempts to read it, following the standard cache
coherency protocol for non-coherent Harvard architecture (Xtensa).

Fixes multicore topology crashes on Intel MTL, LNL, PTL, NVL platforms
when loading external libraries with modules instantiated on secondary
cores.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
(cherry picked from commit 2c248ee)